Abstract: - Approximate computing isan efficient approach for error-tolerant applications because it can trade offaccuracy for power. Addition is a key fundamental function for theseapplications. In this paper, we proposed a low-power yet high-speed accuracy-configurableadder that also maintains a small design area. The proposed adder is based onthe conventional carry look-ahead adder, and its configurability of accuracy isrealized by masking the carry propagation at runtime. Compared with theconventional carry look-ahead adder, with only 14.5% area overhead, theproposed 16-bit adder reduced power consumption by 42.7% and critical pathdelay by 56.9%, most according to the accuracy configuration settings,respectively. Furthermore, compared with other previously studied adders,the experimental results demonstrate that the proposed adder achieved theoriginal purpose of optimizing both power and speed simultaneously withoutreducing the accuracy.