DESIGN OF AREA EFFICIENT WALLACE TREE MULTIPLIER WITH ADVANCED DATA COMPRESSORS
Abstract
Abstract:- Thispaper presents the design of 15- 4 compressor using 5-3 compressors as basic module.Four different types of approximate 5-3 compressors are used in a 15-4compressor for less power consumption and high pass rate. We have analyzed theresults in all the cases. A 16 × 16 bit multiplier is simulated using theproposed 15-4 compressor. Simulation results show that the multipliers withproposed approximate compressors achieve significant improvement in power ascompared to the multipliers with existing 15-4 compressor. Area of the proposedmultipliers are low as compared to other existing approximate multipliers.
Keywords: Wallacetree multiplier, 15-4 compressor, 4 bit parallel adder, Xilinx, 5-3 compressor
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October 2024 |
UGC indexed in (Old UGC) |
2017 |
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30th October, 2024 |
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